This exemple shows a multi blink application using

QFIRE Studio

.

Introduction

Figure 1 shows a multi blink diagram using Unit Delay blocks. These blocks have the initial condition value equal to zero but, due to the Not block, the signal circulating between them have the logical level changed. This change is responsible to the behavior of the system.

Simulation

The signal sent by Unit Delay 1 block goes to high level in the begging. This signal is sent to the next block, Unit Delay 2, e to the Digital Output Port 0. This behavior is followed until the signal sent by Unit Delay 8 becomes high level, when this happens, the Unit Delay 1 sends a low level signal.

The diagram from Figure 1 was ran in a 1Hz task. The result can be seen in Figure 2

It is possible to see how each one of the signals changes the logical level in a different time due to the Unit Delay and Not block.